Moore's Law is Definitely Dead

After more than 50 years of miniaturization, the transistor could stop shrinking in just five years. That is the prediction of the 2015 International Technology Roadmap for Semiconductors, which was officially released earlier this month.

After 2021, the report forecasts, it will no longer be economically desirable for companies to continue to shrink the dimensions of transistors in microprocessors. Instead, chip manufacturers will turn to other means of boosting density, namely turning the transistor from a horizontal to a vertical geometry and building multiple layers of circuitry, one on top of another.

For some, this change will likely be interpreted as another death knell for Moore’s Law, the repeated doubling of transistor densities that has given us the extraordinarily capable computers we have today. Compounding the drama is the fact that this is the last ITRS roadmap, the end to a more-than-20-year-old coordinated planning effort that began in the United States and was then expanded to include the rest of the world.

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Once Again, Moore's Law is Toast

As reported at The Motley Fool, Intel’s latest 10-K / annual report filing would seem to suggest that the ‘Tick-Tock’ strategy of introducing a new lithographic process note in one product cycle (a ‘tick’) and then an upgraded microarchitecture the next product cycle (a ‘tock’) is going to fall by the wayside for the next two lithographic nodes at a minimum, to be replaced with a three element cycle known as ‘Process-Architecture-Optimization’.

Intel’s Tick-Tock strategy has been the bedrock of their microprocessor dominance of the last decade. Throughout the tenure, every other year Intel would upgrade their fabrication plants to be able to produce processors with a smaller feature set, improving die area, power consumption, and slight optimizations of the microarchitecture, and in the years between the upgrades would launch a new set of processors based on a wholly new (sometimes paradigm shifting) microarchitecture for large performance upgrades. However, due to the difficulty of implementing a ‘tick’, the ever decreasing process node size and complexity therein, as reported previously with 14nm and the introduction of Kaby Lake, Intel’s latest filing would suggest that 10nm will follow a similar pattern as 14nm by introducing a third stage to the cadence.

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2nd link.

Intel's Annual Report (PDF).

Moore's Law is Dead: Get Over it

Next month, the worldwide semiconductor industry will formally acknowledge what has become increasingly obvious to everyone involved: Moore's law, the principle that has powered the information-technology revolution since the 1960s, is nearing its end.

A rule of thumb that has come to dominate computing, Moore's law states that the number of transistors on a microprocessor chip will double every two years or so — which has generally meant that the chip's performance will, too. The exponential improvement that the law describes transformed the first crude home computers of the 1970s into the sophisticated machines of the 1980s and 1990s, and from there gave rise to high-speed Internet, smartphones and the wired-up cars, refrigerators and thermostats that are becoming prevalent today.

None of this was inevitable: chipmakers deliberately chose to stay on the Moore's law track. At every stage, software developers came up with applications that strained the capabilities of existing chips; consumers asked more of their devices; and manufacturers rushed to meet that demand with next-generation chips. Since the 1990s, in fact, the semiconductor industry has released a research road map every two years to coordinate what its hundreds of manufacturers and suppliers are doing to stay in step with the law — a strategy sometimes called More Moore. It has been largely thanks to this road map that computers have followed the law's exponential demands.

Not for much longer. The doubling has already started to falter, thanks to the heat that is unavoidably generated when more and more silicon circuitry is jammed into the same small area. And some even more fundamental limits loom less than a decade away. Top-of-the-line microprocessors currently have circuit features that are around 14 nanometres across, smaller than most viruses. But by the early 2020s, says Paolo Gargini, chair of the road-mapping organization, “even with super-aggressive efforts, we'll get to the 2–3-nanometre limit, where features are just 10 atoms across. Is that a device at all?” Probably not — if only because at that scale, electron behaviour will be governed by quantum uncertainties that will make transistors hopelessly unreliable. And despite vigorous research efforts, there is no obvious successor to today's silicon technology.

The industry road map released next month will for the first time lay out a research and development plan that is not centred on Moore's law. Instead, it will follow what might be called the More than Moore strategy: rather than making the chips better and letting the applications follow, it will start with applications — from smartphones and supercomputers to data centres in the cloud — and work downwards to see what chips are needed to support them. Among those chips will be new generations of sensors, power-management circuits and other silicon devices required by a world in which computing is increasingly mobile.

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Moore's Law: Stick a Fork in it! Its Done!

It may be time for another revision to Moore's Law, if Intel's recent troubles keeping pace are any indication.

In a conference call on Wednesday, Intel confirmed that its upcoming generation of processors, codenamed Cannonlake, will not launch until the second half of 2017 -- nearly three years after the previous generation was made available. To bridge the gap, Intel plans to launch the third iteration of its current-generation processors, codenamed Kaby Lake, in the second half of 2016.

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We've already broken the 18 month cycle.  We've already slipped to 30 months and counting for the next iteration.  The Singularity, sir; its done.

 

The Limits of the Limits for Processors

Limits on fundamental limits to computation

Author:

Markov

Abstract:

An indispensable part of our personal and working lives, computing has also become essential to industries and governments. Steady improvements in computer hardware have been supported by periodic doubling of transistor densities in integrated circuits over the past fifty years. Such Moore scaling now requires ever-increasing efforts, stimulating research in alternative hardware and stirring controversy. To help evaluate emerging technologies and increase our understanding of integrated-circuit scaling, here I review fundamental limits to computation in the areas of manufacturing, energy, physical space, design and verification effort, and algorithms. To outline what is achievable in principle and in practice, I recapitulate how some limits were circumvented, and compare loose and tight limits. Engineering difficulties encountered by emerging technologies may indicate yet unknown limits.

pop sci write up of the same.

Broadcom Chairman/CTO: Moore's Law Hits Economic Wall

At a wine bar in San Francisco on Wednesday, Broadcom Chairman and CTO Henry Samueli delivered some sobering news: Moore's Law isn't making chips cheaper anymore.

The famed law of microprocessors predicts that packing more transistors onto a silicon wafer will make processors smaller, faster and cheaper with each generation. The ability to get more chips out of each wafer should cut the cost per transistor with each new generation, according to the logic of the law, which was first proposed by Intel co-founder Gordon Moore in the 1960s.

But keeping Moore's Law going now requires complicated manufacturing techniques that are so expensive they cancel out the cost savings that should come with each new generation, said Samueli, who co-founded the giant communications chip maker in 1991.

"The cost curves are kind of getting flat," Samueli told reporters at an evening Broadcom event at the Tank18 wine bar in San Francisco's trendy South of Market district. Instead of getting more speed, less power consumption and lower cost with each generation, chip makers now have to choose two out of three.

He pointed to new techniques such as High-K Metal Gate and FinFET, which have been used in recent years to achieve new so-called process nodes. The most advanced process node on the market, defined by the size of the features on a chip, is due to reach 14 nanometers next year. At levels like that, chip makers need more than traditional manufacturing techniques to achieve the high density, Samueli said. The more dense chips get, the more expensive it will be to make them, he said.

Process nodes themselves still have room to advance, but they may also be headed for a wall in about 15 years, Samueli said. After another three generations or so, chips will probably reach 5nm, and at that point there will be only 10 atoms from the beginning to the end of each transistor gate, he said. Beyond that, further advances may be impossible.

"You can't build a transistor with one atom," Samueli said. There's no obvious path forward at that point, either. "As of yet, we have not seen a viable replacement for the CMOS transistor as we've known it for the last 50 years."

But the impact of cost increases will come sooner, he said. For some types of processors, chip makers will probably stick with current process nodes. They'll only invest in more dense geometries for chips that have to meet growing performance and power-consumption requirements at any cost, Samueli said. This has already happened in the world of analog chips, where manufacturers still use technology that's five years old or more and innovate instead on design, he said.

While some of the network switch chips Broadcom makes, for example, will demand new process nodes, many processors in consumer devices probably won't, he said. "You don't need to build a Wi-Fi chip in 10nm CMOS. You can do it just fine in 28nm."

Where consumer devices do need newer chip technology to maximize battery life, the ongoing bargain of getting more for less eventually will end, Samueli said. "We've been spoiled by these devices getting cheaper and cheaper and cheaper in every generation. We're just going to have to live with prices leveling off," he said.

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No Exoflops for You Part Duo: Moore's Law *IS* in Decline & it Hurts Supercomputers

Supercomputing users are relentless in their pursuit of compute power so they can run simulations of increasing complexity and scale to tackle mankind's truly big problems. But Moore's Law, once a reliable predictor of computing power's future, has reached its limits.

Supercomputing researchers aren't sure what's next.

Today, supercomputing relies on architectural changes, such as adding speedy GPUs, to boost performance. Researchers may increasingly turn to chips that integrate interconnects and memory to speed processing and reduce energy.

But the teams must also wrestle with the enormous costs of building -- and running -- multi-petaflop systems.

"We have reached the end of the technological era," said William Gropp, chairman of the SC13 conference and a computer science professor at the University of Illinois at Urbana-Champaign.

Gropp likened the supercomputer development terrain today to the advent of CMOS (complementary metal oxide semiconductor), the foundation of today's standard semiconductor technology. The arrival of CMOS was disruptive, but it fostered an expansive age of computing.

The problem is "we don't have a technology that is ready to be adopted as a replacement for CMOS," said Gropp. "We don't have anything at the level of maturity that allows you to bet your company on."

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