Showing posts with label seminar. Show all posts
Showing posts with label seminar. Show all posts

Wednesday, August 14, 2013

Computer Science Seminar at LBNL Tomorrow: Krylov-based Methods for Future Extreme Computing

CS Seminar: Toward Smart-tuned Krylov-based Methods for Future Extreme Computing
Berkeley Lab – Computing Sciences Seminar
Date: Thursday, August 15, 2013

Time: 11:00am - 12:00pm

Location: Bldg. 50F, Room 1647

Speaker: Serge G. Petiton
Maison de la Simulation/CNRS and University Lille 1, Sciences et Technologies

Title: Toward Smart-tuned Krylov-based Methods for Future Extreme Computing

Abstract:
Exascale hypercomputers are expected to have highly hierarchical architectures with nodes composed by lot-of-core processors and accelerators. The different programming levels (from clusters of processors loosely connected to tightly connected lot-of-core processors and/or accelerators) will generate new difficult algorithm issues. New methods should be defined and evaluated with respect to modern state-of-the-art of applied mathematics and scientific methods.

Krylov linear methods such as GMRES and ERAM are now heavily used with success in various domains and industries despite their complexity. Their convergence and speed greatly depends on the hardware used and on the choice of the Krylov subspace size and other parameters which are difficult to determine efficiently in advance. Moreover, hybrid Krylov Methods would allow reducing the communications along all the cores, limiting the reduction only through subsets of these cores. Added to their numerical behaviours and their fault tolerance properties, these methods are interesting candidates for exascale/extreme matrix computing. Avoiding communication strategies may also be developed for each of the instance of these methods, generating complex methods but with high potential efficiencies. These methods have a lot of correlated parameter which may be optimized using auto/smart-tuning strategies to accelerate convergence, minimize storage space, data movements, and energy consumption.

In this talk, we first will present some basic matrix operations utilized on Krylov methods on clusters of accelerators, with respect to a few chosen sparse compressed formats. We will discuss some recent experiments on a cluster of accelerators concerning comparison between orthogonal, incompletely orthogonal and non-orthogonal Krylov Basis computing. Then, we will discuss some results obtained on a cluster of accelerators to compute eigenvalues using the MERAM method with respect to the restarting strategies. We will survey some auto/smarttunning strategies we proposed and evaluated for some of the Krylov method parameters. As a conclusion, we will propose auto-tuning strategies for future hybrid methods on post-petascale computers, on the road to exascale hybrid methods.

Joint wok with: Nahid Emad (U. Versailles), Leroy Drummond (LBNL), France Boillod and Christophe Calvin (CEA), Langshi Chen (CNRS), Maxime Hugu

Wednesday, August 07, 2013

Performance Analysis Gap: Processor Complexity Keeps Climbing – Developers Are More Naïve Than Ever

Performance Analysis Gap: Processor Complexity Keeps Climbing – Developers Are More Naïve Than Ever

Berkeley Lab – Computing Sciences Seminar
Date: Thursday, August 8, 2013

Time: 10:00am - 11:00am

Location: Bldg. 50F, Room 1647

Speaker: Wucherl Yoo
Computer Science Department
University of Illinois

Abstract:

The performance analysis gap is widening as processor complexity keeps climbing and developers are becoming more naïve than ever. Seemingly suitable programs can run correctly, but may suffer from hidden hardware bottlenecks that can severely hinder performance. Performance Monitoring Unit (PMU) events can provide programmers with unique and powerful insights into performance problems in their programs, but interpreting these events has been a significant challenge. While the conventional performance tuning tools can measure and visualize hardware events, they lack automatic identification of dominant resource bottlenecks and significant manual effort is required from experts to interpret the hardware events. 

ARGH!

IDK if I can make it.  I really ought to, but,,,